Intel Arria 10 User Manual

5.3.2.4.1. 8B/10B Decoder Control Code Encoding
Figure 261. 8B/10B Decoder in Control Code Group Detection
datain[9:0]
dataout[7:0]
D31.5D3.4 D24.3 D28.5 K28.5 D15.0 D0.0
BF0083 78 BC BC 0F
tx_clkout
rx_datak
datain[19:10]
tx_clkout
datain[9:0]
rx_datak[1:0]
dataout[15:0]
When the PCS-PMA Interface Width is 10 Bits
When the PCS-PMA Interface Width is 20 Bits
TX
RX
D15.0D3.4 D28.5 D15.0 D3.4 D3.4 D28.5 D3.4
D15.0D24.3 K28.5 D15.0 D3.4 D24.3 K28.5 D3.4
00 01 00 00 01 00
16’h8378 16’hBCBC 16’h0F0F 16’h8383 16’h8378 16’hBCBC 16’h0F0F 16’h8383
83
RX
TX
D3.4
The 8B/10B decoder indicates whether the decoded 8-bit code group is a data or
control code group on rx_datak . If the received 10-bit code group is one of the 12
control code groups (/Kx.y/) specified in the IEEE 802.3 specification, rx_datak is
driven high. If the received 10-bit code group is a data code group (/Dx.y/),
rx_datak is driven low.
5.3.2.4.2. 8B/10B Decoder Running Disparity Checker Feature
Running disparity checker resides in 8B/10B decoder module. This checker checks the
current running disparity value and error based on the rate match output.
rx_runningdisp and rx_disperr indicate positive or negative disparity and
disparity errors, respectively.
5.3.2.5. Pseudo-Random Binary Sequence (PRBS) Checker
Note: Refer to the PRBS Checker section in the Enhanced PCS Architecture chapter.
Related Information
Arria 10 Enhanced PCS Architecture on page 461
5.3.2.6. Byte Deserializer
The byte deserializer allows the transceiver to operate at data rates higher than those
supported by the FPGA fabric. It deserializes the recovered data by multiplying the
data width two or four times, depending upon the deserialization mode selected. The
byte deserializer is optional in designs that do not exceed the FPGA fabric interface
frequency upper limit. You can bypass the byte deserializer by disabling it in the
Quartus Prime Transceiver Native PHY. The byte deserializer operates in disabled,
deserialize x2, or deserialize x4 modes.
5. Arria 10 Transceiver PHY Architecture
UG-01143 | 2018.06.15
Intel
®
Arria
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10 Transceiver PHY User Guide
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Intel Arria 10 Specifications

General

Brand	Intel
Model	Arria 10
Category	Transceiver
Language	English