Intel Arria 10 User Manual

You can write to the address 0x340 at the same time to start the streaming, enable
broadcasting, and select the profile to be streamed. Different requests to multiple
channels can be made simultaneously by writing to the addresses of the desired
channels through the user reconfiguration interface (shared or independent). The
reconfig_waitrequest signal remains asserted after the reconfiguration streaming
is complete.
Related Information
• Steps to Perform Dynamic Reconfiguration on page 516
• Analog Parameter Settings on page 585
6.6. Arbitration
Figure 270. Arria 10 ATX PLL with Embedded Streamer
User
Reconfiguration
Logic
Streamer
ADME
Configuration
Registers
Avalon-MM
To/From
PreSICE
Interface
Optional Reconfiguration Logic
(Capability, Control and Status)
Arria 10 ATX PLL
Internal
Configuration
Bus
Arria 10 ATX PLL IP
Debug Fabric
Host Link
Intel IP
Connectivity to channel reconfiguration registers
and optional soft registers
User Logic
Arbitration
Arbitration
Reconfiguration
Interface
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
512

Intel Arria 10 Specifications

General

Brand	Intel
Model	Arria 10
Category	Transceiver
Language	English