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Intel Arria 10 User Manual

Intel Arria 10
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Figure 271. Arria 10 Native PHY with Embedded Streamer
User
Reconfiguration
Logic
Streamer
ADME
Channel
Configuration
Registers
Avalon-MM
To/From
PreSICE
Interface
Optional Reconfiguration Logic
(Capability, Control and Status,
PRBS Soft Accumulators
Arria 10 Transceiver
Internal
Configuration
Bus
Arria 10 Native PHY
Debug Fabric
Host Link
Intel IP
Connectivity to channel reconfiguration registers
and optional soft registers
User Logic
Arbitration
Arbitration
Reconfiguration
Interface
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
513

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Intel Arria 10 Specifications

General IconGeneral
Transceiver Data RateUp to 17.4 Gbps
Transceiver Protocols SupportedCPRI, JESD204B
Transceiver Power ConsumptionVaries depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver FeaturesClock data recovery
Power Consumption per ChannelVaries depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver TypeFPGA integrated transceiver
Operating Temperature Range-40°C to 100°C (Industrial)
Number of Transceiver Channelsup to 96 full-duplex

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