Protocol analysisMXO 4 Series
336User Manual 1335.5337.02 ─ 07
● I²C trigger settings.................................................................................................344
● I²C decode results.................................................................................................348
● Performing I2C decoding...................................................................................... 350
13.3.1 About the I²C protocol
This chapter provides an overview of protocol characteristics, data format, address
types and trigger possibilities. For detailed information, read the "I2C-bus specification
and user manual" available on the NXP manuals webpage at http://www.nxp.com/.
I²C characteristics
The main characteristics of I²C are:
●
Two-wire design: serial clock (SCL) and serial data (SDA) lines
●
Controller/ target communication: the controller generates the clock and addresses
the targets. Targets receive the address and the clock. Both controller and targets
can transmit and receive data.
●
Addressing scheme: each target device is addressable by a unique address. Multi-
ple target devices can be linked together and can be addressed by the same con-
troller.
●
Read/write bit: specifies if the controller reads (=1) or writes (=0) the data.
●
Acknowledge: takes place after every byte. The receiver of the address or data
sends the acknowledge bit to the transmitter.
The MXO 4 supports all operating speed modes: high-speed, fast mode plus, fast
mode, and standard mode.
Data transfer
The format of a simple I²C message (frame) with 7-bit addressing consists of the fol-
lowing parts:
●
Start condition: a falling slope on SDA while SCL is high
●
7-bit address of the target device that is either written to or read from
●
R/W bit: specifies if the data is written to or read from the target
●
ACKnowledge bits: is issued by the receiver of the previous byte if the transfer was
successful
Exception: At read access, the controller terminates the data transmission with a
NACK bit after the last byte.
●
Data: several data bytes with an ACK bit after every byte
●
Stop condition: a rising slope on SDA while SCL is high
I²C (option R&S
MXO4-K510)