Intel Arria 10 User Manual

Using the 1G/10GbE PHY without the Sequencer
The sequencer brings up channel-based initial datapath and performs parallel
detection. To use the 1G/10GbE PHY without the sequencer, turn off the Enable
automatic speed detection parameter.
Turning off the sequencer results in the following additional ports:
•
rc_busy
•
start_pcs_reconfig
•
mode_1g_10gbar
These ports perform manual reconfiguration. The following figure shows how these
ports are used for 1G and 10G configuration.
Figure 77. Timing for Reconfiguration without the Sequencer
mgmt_clk
rc_busy
start_pcs_reconfig
mode_1g_10bar
2.6.4.10. Channel Placement Guidelines
The channels of multi-channel 1G/10G designs do not need to be placed contiguously.
However, channels instantiated in different transceiver banks require PLLs in the same
bank.
Related Information
Arria 10 Avalon-MM Interface for PCIe* Solutions
2.6.4.11. Design Example
Intel provides a design example to assist you in integrating your Ethernet PHY IP into
your complete design.
The MAC and PHY design example instantiates the 1G/10GbE PHY IP along with the
1G/10G Ethernet MAC and supporting logic. It is part of the Quartus II software
installation and is located in the <quartus2_install_dir>/ip subdirectory. For more
information about this example design, refer to the 10-Gbps Ethernet MAC IP Function
User Guide.
A design example that instantiates the 1G/10G PHY and its supporting logic is
available on the Intel FPGA wiki. The following figure shows the block diagram of the
1G/10GbE PHY-only design example. The default configuration includes two channels
for backplane Ethernet and two channels for line-side (1G/10G) applications.
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
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10 Transceiver PHY User Guide
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Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex