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Renesas RL78 Series User Manual

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 982
Dec 10, 2015
15.8 LIN Communication Operation
15.8.1 LIN transmission
Of UART transmission, UART0 support LIN communication.
For LIN transmission, channel 0 of unit 0 is used.
UART UART0 UART1
Support of LIN communication Supported Not supported
Target channel Channel 0 of SAU0
Pins used TxD0
Interrupt INTST0
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer
mode) can be selected.
Error detection flag None
Transfer data length 8 bits
Transfer rate Max. fMCK/6 [bps] (SDR00 [15:9] = 2 or more), Min. fCLK/(2 × 2
11
× 128) [bps]
Note
Data phase Forward output (default: high level)
Reverse output (default: low level)
Parity bit No parity bit
Stop bit Appending 1 bit
Data direction MSB or LSB first
Note Use this operation within a range that satisfies the conditions above and the AC characteristics in the electrical
specifications. The transfer rate of LIN communication is usually set to 2.4, 9.6, or 9.2 kbps.
Remark f
MCK: Operation clock frequency of target channel
fCLK: System clock frequency

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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