RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 955
Dec 10, 2015
15.6.7 Calculating transfer clock frequency
The transfer clock frequency for SPI function (CSI00, CSI01, CSI10, CSI11) communication can be calculated by the
following expressions.
(1) Master
(Transfer clock frequency) = {Operation clock (fMCK) frequency of target channel} ÷ (SDRmn[15:9] + 1) ÷ 2 [Hz]
(2) Slave
(Transfer clock frequency) = {Frequency of serial clock (fSCK) supplied by master}
Note
[Hz]
Note The permissible maximum transfer clock frequency is fMCK/6.
Remark 1. The value of SDRmn[15:9] is the value of bits 15 to 9 of serial data register mn (SDRmn) (0000000B
to 1111111B) and therefore is 0 to 127.
2. The operation clock (f
MCK) is determined by serial clock select register m (SPSm) and bit 15 (CKSmn)
of serial mode register mn (SMRmn).
3. m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), p: CSI number (p = 00, 01, 10, 11),
mn = 00, 01, 10, 11
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