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Renesas RL78 Series - Cani Transmit;Receive FIFO Status Register K (Cfstsk) (I = 0) (K = 0)

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 18 CAN INTERFACE (RS-CAN LITE)
R01UH0368EJ0210 Rev.2.10 1342
Dec 10, 2015
18.3.47 CANi Transmit/Receive FIFO Status Register k (CFSTSk) (i = 0) (k = 0)
Address CFSTS0L: F0358H, CFSTS0H: F0359H
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
— — CFMC[5:0] — — — CF
TXIF
CF
RXIF
CF
MLT
CF
FLL
CF
EMP
After Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Bit Symbol Bit Name Description R/W
15, 14 Reserved These bits are always read as 0. The write value should
always be 0.
R
13 to 8 CFMC[5:0] Transmit/Receive FIFO
Message Counter
The number of messages stored in the transmit/receive
FIFO buffer is indicated.
R
7 to 5 Reserved These bits are always read as 0. The write value should
always be 0.
R
4 CFTXIF Transmit/Receive FIFO
Transmit Interrupt Request
Flag
0: No transmit/receive FIFO transmit interrupt request is
present.
1: A transmit/receive FIFO transmit interrupt request is
present.
R/(W)
Note
3 CFRXIF Transmit/Receive FIFO
Receive Interrupt Request
Flag
0: No transmit/receive FIFO receive interrupt request is
present.
1: A transmit/receive FIFO receive interrupt request is
present.
R/(W)
Note
2 CFMLT Transmit/Receive FIFO
Message Lost Flag
0: No transmit/receive FIFO message is lost.
1: A transmit/receive FIFO message is lost.
R/(W)
Note
1 CFFLL Transmit/Receive FIFO Buffer
Full Status Flag
0: The transmit/receive FIFO buffer is not full.
1: The transmit/receive FIFO buffer is full.
R
0 CFEMP Transmit/Receive FIFO Buffer
Empty Status Flag
0: The transmit/receive FIFO buffer contains messages.
1: The transmit/receive FIFO buffer contains no message
(buffer empty).
R
Note The only effective value for writing to this flag bit is 0, which clears the bit. Otherwise writing to the bit results in
retention of its state. To write 0 to this flag bit, write by using an 8-bit data transfer instruction or a 16-bit data
transfer instruction.
CFMC[5:0] Bits
The CFMC[5:0] bits indicate the following values that depend on the setting of the CFM[1:0] bits in the CFCCHk
register.
When CFM[1:0] value is B'01 (transmit mode): Number of untransmitted messages in the buffer
When CFM[1:0] value is B'00 (receive mode): Number of unread received messages in the buffer
These bits are cleared to 0 when any of the following conditions is met.
When CFM[1:0] value is B'00: In global reset mode
When CFM[1:0] value is B'01: In channel reset mode
CFTXIF Flag
The CFTXIF flag is set to 1 when the following condition is met.
When CFM[1:0] value is B'01 and interrupt source setting the CFIM bit in the CFCCLk register is generated.
The CFTXIF flag is cleared to 0 when any of the following conditions is met.
Write 0 to the CFTXIF flag
When CFM[1:0] value is B'00: In global reset mode
When CFM[1:0] value is B'01: In channel reset mode
Clear this flag to 0 in global operating mode or global test mode.
<R>

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