Renesas RL78 Series - Timer RD ELC Register (TRDELC)

RL78/F13, F14 CHAPTER 8 TIMER RD
R01UH0368EJ0210 Rev.2.10 572
Dec 10, 2015
8.2.3 Timer RD ELC Register (TRDELC)
Figure 8-4. Format of Timer RD ELC Register (TRDELC)
Address: F0260H After Reset: 00H
Symbol 7 6 5 4 3 2 1 0
TRDELC — — ELCOBE1 ELCICE1 — — ELCOBE0 ELCICE0
Bits 7 to 6 Nothing is assigned R/W
— The write value must be 0. The read value is 0. R
ELCOBE1
ELC event input 1 enable for timer RD pulse output forced cutoff R/W
0 Forced cutoff is disabled R/W
1 Forced cutoff is enabled
ELCICE1
ELC event input 1 select for timer RD input capture D1 R/W
0 Input capture D1 is selected R/W
1 Event input 1 from the event link controller (ELC) is selected
Bits 3 to 2 Nothing is assigned R/W
— The write value must be 0. The read value is 0. R
Caution The timer RD ELC register (TRDELC) is only available in the RL78/F14. Do not access the register
in other products.
ELCOBE0
ELC event input 0 enable for timer RD pulse output forced cutoff R/W
0 Forced cutoff is disabled R/W
1 Forced cutoff is enabled
ELCICE0
ELC event input 0 select for timer RD input capture D0 R/W
0 Input capture D0 is selected R/W
1 Event input 0 from the event link controller (ELC) is selected