RL78/F13, F14 CHAPTER 12 A/D CONVERTER
R01UH0368EJ0210 Rev.2.10 738
Dec 10, 2015
12.6.3 Software trigger mode (scan mode, sequential conversion mode)
<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system enters the
A/D conversion standby status.
<2> After the software counts up to the stabilization wait time (1 s), the ADCS bit of the ADM0 register is set to 1 to
perform A/D conversion on the four analog input channels specified by scan 0 to scan 3, which are specified by the
analog input channel specification register (ADS). A/D conversion is performed on the analog input channels in
order, starting with that specified by scan 0.
<3> A/D conversion is sequentially performed on the four analog input channels, the conversion results are stored in
the A/D conversion result register (ADCR, ADCRH) each time conversion ends, and the A/D conversion end
interrupt request signal (INTAD) is generated. After A/D conversion of the four channels ends, the A/D conversion
of the channel following the specified channel automatically starts (until all four channels are finished).
<4> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is interrupted, and
conversion restarts at the first channel. The partially converted data is discarded.
<5> When the value of the ADS register is rewritten or overwritten during conversion operation, the current A/D
conversion is interrupted, and A/D conversion is performed on the first channel respecified by the ADS register.
The partially converted data is discarded.
<6> Even if a hardware trigger is input during conversion operation, A/D conversion does not start.
<7> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted, and the system
enters the A/D conversion standby status.
<8> When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the stop status.
When ADCE = 0, specifying 1 for ADCS is ignored and A/D conversion does not start.
Figure 12-24. Example of Software Trigger Mode (Scan Mode, Sequential Conversion Mode) Operation Timing
ADCE
ADCS
ADS
INTAD
ADCR,
ADCRH
A/D
conversion
status
ADCE is set to 1.
<1>
ADCE is cleared to 0.
<8>
The trigger
is not
acknowledged.
The trigger
is not
acknowledged.
ADCS is set to 1 while in the
conversion standby status.
<2>
Conversion
standby
Conversion
standby
Stop
status
Stop
status
Data 1
(ANI0)
Data 1
(ANI0)
Data 2
(ANI1)
Data 2
(ANI1)
Data 3
(ANI2)
Data 3
(ANI2)
Data 4
(ANI3)
Data 1
(ANI0)
Data 2
(ANI1)
Data 6
(ANI5)
Data 6
(ANI5)
Data 5
(ANI4)
Data 5
(ANI4)
Data 5
(ANI4)
Data 2
(ANI1)
Data 3
(ANI2)
Data 3
(ANI2)
Data 4
(ANI3)
Data 1
(ANI0)
Data 4
(ANI3)
Data 8
(ANI7)
Data 8
(ANI7)
Data 7
(ANI6)
Data 7
(ANI6)
Data 4
(ANI3)
Data 1
(ANI0)
Data 5
(ANI4)
Data 1
(ANI0)
Data 2
(ANI1)
Data 2
(ANI1)
Data 6
(ANI5)
Conversion is
interrupted and restarts.
Conversion is
interrupted and restarts.
Conversion is
interrupted.
A/D conversion ends and the
next conversion starts.
<3>
ADCS is overwritten
with 1 during A/D
conversion operation.
<4>
<3> <3>
ADS is rewritten during
A/D conversion operation.
<5>
ADCS is cleared
to 0 during A/D
conversion operation.
<7>
A hardware trigger is
generated (and ignored).
<6>
The interrupt is generated four times. The interrupt is generated four times. The interrupt is generated four times.
Data 1 (ANI0)
ANI4 to ANI7ANI0 to ANI3
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