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Renesas RL78 Series User Manual

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 36 ELECTRICAL SPECIFICATIONS (GRADE Y)
R01UH0368EJ0210 Rev.2.10 1822
Dec 10, 2015
36.5.3 On-chip Debug (UART)
(TA = -40 to +150C, 2.7 V EVDD0 = EVDD1 = VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Transfer rate - 115.2 k 1 M bps
36.5.4 LIN/UART Module (RLIN3) UART Mode
(T
A = -40 to +150C, 2.7 V EVDD0 = EVDD1 = VDD 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Transfer rate -
Operation mode,
HALT mode
LIN communication clock source
(f
CLK or fMX):
4 to 24 MHz
4000 kbps
SNOOZE mode
LIN communication clock source
(f
CLK):
1 to 24 MHz
FRQSEL4 = 0 in the user option
byte (000C2H/020C2H)
4.8
LIN communication clock source
(f
CLK):
1 to 24 MHz
FRQSEL4 = 1 in the user option
byte (000C2H/020C2H)
2.4

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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