Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1216
Dec 10, 2015
17.4.5 Status
During LIN mode operation, the LIN/UART module can detect seven types of statuses.
The four statuses, successful frame/wake-up transmission, successful frame/wake-up reception, error detection, successful
header transmission//header reception, can generate interrupt requests.
Table 17-14 shows the types of statuses available in LIN master mode. Table 17-15 lists the types of statuses available in
LIN slave mode [auto baud rate] and in LIN slave mode [fixed baud rate].
Table 17-14. Types of Statuses in LIN Master Mode
Status Status set condition Status clear condition
Operation mode
capable of status
detection
Corresponding
bit
Interrupt
Reset After the OM0 bit in the LCUCn
register is set to not-LIN–reset-
mode, if actually the LIN/UART
module is cleared from LIN reset
mode.
After the OM0 bit in the
LCUCn register is set to LIN
reset mode, if actually the
LIN/UART module enters LIN
reset mode.
All modes OMM0 bit in
LMSTn
register
Not
available
Operation
mode
After the OM1 bit in the LCUCn
register is set to LIN operation
mode, if actually the LIN/UART
module enters LIN operation
mode.
After the OM1 bit in the
LCUCn register is set to LIN
wake-up mode, if actually the
LIN/UART module enters LIN
wake-up mode.
 LIN operation
mode
 LIN wake-up
mode
OMM1 bit in
LMSTn
register
Not
available
Frame/wake-up
transmission
end
When a frame (header
transmission + response
transmission), a wake-up signal,
or a data group is transmitted
successfully.
 When another
communication is started
 When cleared by software
 After transition to LIN
reset mode
 LIN operation
mode
 LIN wake-up
mode
FTC flag in
LSTn register
Available
Frame/wake-up
reception end
When a frame (header
transmission + response
reception), a wake-up signal, or a
data group is received
successfully.
 When another
communication is started
 When cleared by software
 After transition to LIN
reset mode
 LIN operation
mode
 LIN wake-up
mode
FRC flag in
LSTn register
Available
Error detection If any of the PRER flag, CSER
flag, FER flag, FTER flag, PBER
flag, and BER flags in the LESTn
register turns 1 (error detected).
 When another
communication is started
 When cleared by software
Note 1
 After transition to LIN
reset mode
 LIN operation
mode
 LIN wake-up
mode
ERR flag in
LSTn register
Available
Data 1
reception end
The RFT bit in the LDFCn register
is 0 (reception) and the first byte
of the response field is
received
Note 2
.
 When another
communication is started
 When cleared by software
 After transition to LIN
reset mode
LIN
operation mode D1RC flag in
LSTn register
Not
available
Header
reception end
When a header field is received
successfully.
 When another
communication is started
 When cleared by software
 After transition to LIN
reset mode
LIN
operation mode HTRC flag in
LSTn register
Available
Notes 1. In LIN wake-up mode and LIN operation mode, the ERR flag in the LSTn register is cleared to 0 by writing 0
to the PRER flag, CSER flag, FER flag, FTER flag, PBER flag or BER flags in the LESTn register.
2. Not detected when the RFDL[3:0] bits in the LDFCn register are 0000b (0-byte + checksum).
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Renesas RL78 Series Specifications

General

Brand	Renesas
Model	RL78 Series
Category	Computer Hardware
Language	English