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Renesas RL78 Series User Manual

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 26 VOLTAGE DETECTOR
R01UH0368EJ0210 Rev.2.10 1577
Dec 10, 2015
26.5 Cautions for Voltage Detector
26.5.1 Checking reset source
When a reset occurs, check the reset source by using the following method.
Figure 26-9. Checking Reset Source
Note When instruction code FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
debug emulator.
Reset processing by
voltage detector
Reset processing by
watchdog timer
Reset processing by
clock monitor
Reset processing by
external reset
No
Yes
Yes
No
Check reset source
Yes
Yes
No
Yes
No
No
Yes
No
Reset processing by
illegal-memory access
Reset processing by
illegal instruction execution
Note
LVIRF of RESF
register = 1 ?
IAWRF of RESF
register = 1?
WDCLRF of RESF
register = 1 ?
TRAP of RESF
register = 1 ?
POCRES0 of
POCRES register = 0 ?
CLKRF of POCRES
register = 1 ?
Reset processing by
power-on reset circuit

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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