Renesas RL78 Series

RL78/F13, F14 CHAPTER 12 A/D CONVERTER
R01UH0368EJ0210 Rev.2.10 737
Dec 10, 2015
12.6.2 Software trigger mode (select mode, one-shot conversion mode)
<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system enters the
A/D conversion standby status.
<2> After the software counts up to the stabilization wait time (1 s), the ADCS bit of the ADM0 register is set to 1 to
perform the A/D conversion of the analog input specified by the analog input channel specification register (ADS).
<3> When A/D conversion ends, the conversion result is stored in the A/D conversion result register (ADCR, ADCRH),
and the A/D conversion end interrupt request signal (INTAD) is generated.
<4> After A/D conversion ends, the ADCS bit is automatically cleared to 0, and the system enters the A/D conversion
standby status.
<5> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is interrupted, and
conversion restarts. The partially converted data is discarded.
<6> When the value of the ADS register is rewritten or overwritten during conversion operation, the current A/D
conversion is interrupted, and A/D conversion is performed on the analog input respecified by the ADS register.
The partially converted data is discarded.
<7> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted, and the system
enters the A/D conversion standby status.
<8> When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the stop status.
When ADCE = 0, specifying 1 for ADCS is ignored and A/D conversion does not start. In addition, A/D conversion
does not start even if a hardware trigger is input while in the A/D conversion standby status.
Figure 12-23. Example of Software Trigger Mode (Select Mode, One-Shot Conversion Mode) Operation Timing
ADCE
ADCS
ADS
INTAD
ADCR,
ADCRH
A/D
conversion
status
ADCE is set to 1.
<1>
ADCS is set to
1 while in the
conversion
standby status.
ADCS is
automatically
cleared to
0 after
conversion
ends.
<2> <4> <2> <2>
<4>
<2><4>
A/D
conversion
ends.
<3>
ADCS is overwritten
with 1 during A/D
conversion operation.
<5>
Conversion is
interrupted
and restarts.
Conversion is
interrupted.
<3>
ADS is rewritten during
A/D conversion operation
(from ANI0 to ANI1).
<6>
<3>
ADCE is cleared to 0.
<8>
ADCS is
cleared to
0 during A/D
conversion
operation.
<7>
The trigger
is not
acknowledged.
The trigger
is not
acknowledged.
Conversion
standby
Conversion
standby
Conversion
standby
Conversion
standby
Conversion
standby
Data 1
(ANI0)
Data 2
(ANI1)
Stop
status
Data 1
(ANI0)
Data 1
(ANI0)
Data 1
(ANI0)
Data 1
(ANI0)
Data 2
(ANI1)
Data 1
(ANI0)
Data 1
(ANI0)
Data 2
(ANI1)
Data 2
(ANI1)
Stop
status