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Renesas RL78 Series

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 4 PORT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 300
Dec 10, 2015
4.2.14 Port 15
Port 15 is an I/O port with an output latch. Port 15 can be set to the input mode or output mode in 1-bit units using port
mode register 15 (PM15). When the P150 to P157 pins are used as an input port, use of an on-chip pull-up resistor can
be specified in 1-bit units by pull-up resistor option register 15 (PU15).
For the P150, P152, and P153 pin input, the threshold of the input buffer can be specified in 1-bit units using the port
input threshold control register 15 (PITHL15).
This port can also be used for data I/O and clock I/O for serial interface (CSI), slave select input, and SNOOZE status
output.
Reset signal generation sets P150 to P157 to input mode.
Table 4-25. Settings of Registers When Using Port 15
Pin Name PM15x PITHL15x Alternate Function Setting
Note 4
Remark
Name I/O
P150 Input 1 0 × CMOS input
(Schmitt1 input)
1 × CMOS input
(Schmitt3 input)
Output 0 × ×
P151 Input 1 ×
Output 0 (SO11 output = 1)
Note 1
P152 Input 1 0 × CMOS input
(Schmitt1 input)
1 × CMOS input
(Schmitt3 input)
Output 0 × ×
P153 Input 1 0 × CMOS input
(Schmitt1 input)
1 × CMOS input
(Schmitt3 input)
Output 0 × (SCK11 output = 1)
Note 3
P154 Input 1 ×
Output 0 (SNZOUT7 output = 0)
Note 2
P155 Input 1 ×
Output 0 (SNZOUT6 output = 0)
Note 2
P156 Input 1 ×
Output 0 (SNZOUT5 output = 0)
Note 2
P157 Input 1 ×
Output 0 (SNZOUT4 output = 0)
Note 2
Notes 1. When a pin sharing the serial array unit function is to be used as a general-purpose port pin, the SOmn bit
of the serial output register m (SOm), the SOEmn bit of the serial output enable register m (SOEm), and
the SEmn bit of the serial channel enable status register m (SEm) corresponding to the target unit and
channel must have the same setting as its initial value (m = 0, 1, n = 0, 1).
2. When a pin sharing the SNOOZE status output function is to be used as a general-purpose port pin, the
OUTEN0 to OUTEN7 bits of the SNOOZE status output control registers 0, 1, 2, 3 (PSNZCNT0, 1, 2, 3)
must have the same setting as its initial value.

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