Renesas RL78 Series - CAN Global Test Configuration Register (GTSTCFG)

RL78/F13, F14 CHAPTER 18 CAN INTERFACE (RS-CAN LITE)
R01UH0368EJ0210 Rev.2.10 1376
Dec 10, 2015
18.3.79 CAN Global Test Configuration Register (GTSTCFG)
Address GTSTCFGL: F038CH, GTSTCFGH: F038DH
b15 B14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
— — — — — RTMPS[2:0] — — — — — — — —
After Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Symbol Bit Name Description R/W
15 to 11 — Reserved These bits are always read as 0. The write value should
always be 0.
R
10 to 8 RTMPS[2:0] RAM Test Page Configuration Set a value within a range of page 0 (H'00) to page 2
(H'02).
R/W
7 to 0 — Reserved These bits are always read as 0. The write value should
always be 0.
R
Modify the GTSTCFG register only in global test mode.
• RTMPS[2:0] Bits
These bits are used to set the RAM test target page number for RAM test. Set a value from H'00 to H'02.