Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 12 A/D CONVERTER
R01UH0368EJ0210 Rev.2.10 729
Dec 10, 2015
12.3.13 A/D converter trigger select register 1 (ADTRGS1) (RL78/F13 only)
This register is used to enable or disable operation trigger generation of the A/D converter when the timer RJ0 interrupt
request is generated.
Set this register while the timer RJ0 interrupt request is not generated.
Reset signal generation clears this register to 00H.
Figure 12-17. Format of A/D Converter Trigger Select Register 1 (ADTRGS1)
Address: F078DH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
ADTRGS1 0 0 0 0 0 0 0 ADTRGS10
ADTRGS10 Selection of the operation trigger of the A/D converter when the timer RJ0 interrupt request is generated
0 The operation trigger of the A/D converter is not generated when the interrupt request is generated.
1
The operation trigger of the A/D converter is generated when the interrupt request is generated (A/D
conversion is started).

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit