Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 7 TIMER RJ
R01UH0368EJ0210 Rev.2.10 557
Dec 10, 2015
7.4.2 Timer Mode
In this mode, the counter is decremented by the count source selected by bits TCK0 to TCK2 in the TRJMR0 register.
In timer mode, the count value is decremented by 1 each time the count source is input. When the count value reaches
0000H and the next count source is input, an underflow occurs and an interrupt request is generated.
Figure 7-12 shows the Operation Example in Timer Mode.
Figure 7-12. Operation Example in Timer Mode
Timer RJ0 counter
Counter reloading occurs
Set to 0 by a
program
Count source
Reload register
TUNDF bit in
TRJCR0 register
02FAH02F9H02F8H02F7H 1010H100FH100EH ••••• ••••• 0000H1010H100FH100EH100DH100CH100BH
Previous value
(0300H)
New value (1010H)
Acknowledgement of an interrupt request
IF bit in INTC register
An underflow
occurs

Renesas RL78 Series Specifications

General

Brand	Renesas
Model	RL78 Series
Category	Computer Hardware
Language	English