Renesas RL78 Series - AD Port Configuration Register (ADPC)

RL78/F13, F14 CHAPTER 12 A/D CONVERTER
R01UH0368EJ0210 Rev.2.10 727
Dec 10, 2015
12.3.11 A/D port configuration register (ADPC)
This register switches the ANI0/P33 to ANI23/P105 pins to analog input of A/D converter or digital I/O of port.
The ADPC register can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 12-15. Format of A/D Port Configuration Register (ADPC)
Address: F0076H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
ADPC 0 0 0 ADPC4
Note
ADPC3 ADPC2 ADPC1 ADPC0
ADPC4 ADPC3 ADPC2 ADPC1 ADPC0
Analog input (A)/digital I/O (D) switching
ANI23/P105 ANI22/P104 ANI21/P103 ANI20/P102 ANI19/P101 ANI18/P100 ANI17/P97 ANI16/P96 ANI15/P95 ANI14/P94 ANI13/P93 ANI12/P92 ANI11/P91 ANI10/P90 ANI9/P87 ANI8/P86 ANI7/IVREF0/P85 ANI6/IVCMP03/P84 ANI5/IVCMP02/P83 ANI4/IVCMP01/P82 ANI3/IVCMP00/P81 ANI2/ANO0/P80 ANI1/AV
REFM/P34
ANI0/AV
REFP/P33
0 0 0 0 0 A A A A A A A A A A A A A A A A A A A A A A A A
0 0 0 0 1 D D D D D D D D D D D D D D D D D D D D D D D D
0 0 0 1 0 D D D D D D D D D D D D D D D D D D D D D D D A
0 0 0 1 1 D D D D D D D D D D D D D D D D D D D D D D A A
0 0 1 0 0 D D D D D D D D D D D D D D D D D D D D D A A A
0 0 1 0 1 D D D D D D D D D D D D D D D D D D D D A A A A
0 0 1 1 0 D D D D D D D D D D D D D D D D D D D A A A A A
0 0 1 1 1 D D D D D D D D D D D D D D D D D D A A A A A A
0 1 0 0 0 D D D D D D D D D D D D D D D D D A A A A A A A
0 1 0 0 1 D D D D D D D D D D D D D D D D A A A A A A A A
0 1 0 1 0 D D D D D D D D D D D D D D D A A A A A A A A A
0 1 0 1 1 D D D D D D D D D D D D D D A A A A A A A A A A
0 1 1 0 0 D D D D D D D D D D D D D A A A A A A A A A A A
0 1 1 0 1 D D D D D D D D D D D D A A A A A A A A A A A A
0 1 1 1 0 D D D D D D D D D D D A A A A A A A A A A A A A
0 1 1 1 1 D D D D D D D D D D A A A A A A A A A A A A A A
1 0 0 0 0 D D D D D D D D D A A A A A A A A A A A A A A A
1 0 0 0 1 D D D D D D D D A A A A A A A A A A A A A A A A
1 0 0 1 0 D D D D D D D A A A A A A A A A A A A A A A A A
1 0 0 1 1 D D D D D D A A A A A A A A A A A A A A A A A A
1 0 1 0 0 D D D D D A A A A A A A A A A A A A A A A A A A
1 0 1 0 1 D D D D A A A A A A A A A A A A A A A A A A A A
1 0 1 1 0 D D D A A A A A A A A A A A A A A A A A A A A A
1 0 1 1 1 D D A A A A A A A A A A A A A A A A A A A A A A
1 1 0 0 0 D A A A A A A A A A A A A A A A A A A A A A A A
Other than above Setting prohibited
(Note and Cautions are listed on the next page.)