Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 16 SERIAL INTERFACE IICA
R01UH0368EJ0210 Rev.2.10 1023
Dec 10, 2015
16.3.2 IICA control register 00 (IICCTL00)
This register is used to enable/stop I
2
C operations, set wait timing, and set other I
2
C operations.
The IICCTL00 register can be set by a 1-bit or 8-bit memory manipulation instruction. However, set the SPIE0,
WTIM0, and ACKE0 bits while IICE0 = 0 or during the wait period. These bits can be set at the same time when the
IICE0 bit is set from “0” to “1”.
Reset signal generation clears this register to 00H.

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit