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Renesas RL78 Series User Manual

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 18 CAN INTERFACE (RS-CAN LITE)
R01UH0368EJ0210 Rev.2.10 1372
Dec 10, 2015
18.3.75 CANi Transmit History Buffer Status Register (THLSTSi) (i = 0)
Address THLSTS0L: F0380H, THLSTS0H: F0381H
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
— — THLMC[3:0] — — — — THL
IF
THL
ELT
THL
FLL
THL
EMP
After
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Bit Symbol Bit Name Description R/W
15 to 12 Reserved These bits are always read as 0. The write value should
always be 0.
R
11 to 8 THLMC[3:0] Transmit History Buffer Unread
Data Counter
These bits indicate the number of unread data sets
stored in the transmit history buffer.
R
7 to 4 Reserved These bits are always read as 0. The write value should
always be 0.
R
3 THLIF Transmit History Interrupt
Request Flag
0: No transmit history interrupt request is present.
1: A transmit history interrupt request is present.
R/(W)
Note
2 THLELT Transmit History Buffer
Overflow
Flag
0: Transmit history buffer overflow has not occurred.
1: Transmit history buffer overflow has occurred.
R/(W)
Note
1 THLFLL Transmit History Buffer Full
Status Flag
0: Transmit history buffer is not full.
1: Transmit history buffer is full.
R
0 THLEMP Transmit History Buffer Empty
Status Flag
0: Transmit history buffer contains unread data.
1: Transmit history buffer contains no unread data (buffer
empty).
R
Note The only effective value for writing to this flag bit is 0, which clears the bit. Otherwise writing to the bit results in
retention of its state. To write 0 to this flag bit, write by using an 8-bit data transfer instruction or a 16-bit data
transfer instruction.
THLMC[3:0] Bits
These bits indicate the number of unread data sets stored in the transmit history buffer.
THLIF Flag
The THLIF flag is set to 1 when the interrupt source set by the THLIM bit in the THLCCi register has occurred.
This flag is cleared to 0 in channel reset mode or by writing 0 to this flag by the program.
THLELT Flag
The THLELT flag is set to 1 when it is attempted to store new transmit history data while the transmit history
buffer is full. In this case, the new data is discarded. This flag becomes 0 in channel reset mode or by writing 0
to this flag by the program.
THLFLL Flag
The THLFLL flag is set to 1 when 8 data sets have been stored in the transmit history buffer, and is cleared to 0
when the number of data sets stored in the transmit history buffer has decreased to less than 8. This bit is also
cleared to 0 in channel reset mode or when the THLE bit in the THLCCi register is set to 0 (transmit history
buffer is not used).
THLEMP Flag
The THLEMP flag is cleared to 0 when even a single set of transmit history data has been stored in the transmit
history buffer.
This flag is set to 1 when all the data in the transmit history buffer has been read. This flag is also set to 1 in
channel reset mode or when the THLE bit in the THLCCi register is set to 0 (transmit history buffer is not used).
<R>

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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