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Renesas RL78 Series

Renesas RL78 Series
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RL78/F13, F14 CHAPTER 8 TIMER RD
R01UH0368EJ0210 Rev.2.10 599
Dec 10, 2015
8.2.17 Timer RD PWM Function Output Level Control Register i (TRDPOCRi) (i = 0 or 1)
Settings to the TRDPOCRi register are enabled only in PWM function. When not in PWM function, they are disabled.
Figure 8-28. Format of Timer RD PWM Function Output Level Control Register i (TRDPOCRi) (i= 0 or 1)
[PWM Function]
Address: F0275H (TRDPOCR0), F0285H (TRDPOCR1) After Reset: 00H
Note
Symbol 7 6 5 4 3 2 1 0
TRDPOCRi — — — — POLD POLC POLB
POLD PWM function output level control D R/W
0 TRDIODi output level is low active R/W
1 TRDIODi output level is high active
POLC PWM function output level control C R/W
0 TRDIOCi output level is low active R/W
1 TRDIOCi output level is high active
POLB PWM function output level control B R/W
0 TRDIOBi output level is low active R/W
1 TRDIOBi output level is high active
Note The value after reset is undefined when FRQSEL4 = 1 in the user option byte (000C2H/020C2H) and TRD0EN
= 0 in the PER1 register. If it is necessary to read the initial value, set f
CLK to fIH and TRD0EN = 1 before reading.
Bits 7 to 3 Nothing is assigned R/W
The write value must be 0. The read value is 0. R

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