Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 3 CPU ARCHITECTURE
R01UH0368EJ0210 Rev.2.10 187
Dec 10, 2015
3.4 Addressing for Processing Data Addresses
3.4.1 Implied addressing
[Function]
Instructions for accessing registers (such as accumulators) that have special functions are directly specified with the
instruction word, without using any register specification field in the instruction word.
[Operand format]
Implied addressing can be applied only to MULU X.
Figure 3-47. Outline of Implied Addressing
3.4.2 Register addressing
[Function]
Register addressing accesses a general-purpose register as an operand. The instruction word of 3-bit long is used to
select an 8-bit register and the instruction word of 2-bit long is used to select a 16-bit register.
[Operand format]
Identifier Description
r X, A, C, B, E, D, L, H
rp AX, BC, DE, HL
Figure 3-48. Outline of Register Addressing
A register
OP code
Memory
(register area)
Instruction code
Register
OP code
Memory
(register bank area)

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit