RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1197
Dec 10, 2015
17.3.1 LIN Reset Mode
Setting the OM0 bit in the LCUCn register to 0b (LIN reset mode) causes a transition to LIN reset mode. The change to LIN
reset mode can be verified by determining that the OMM0 bit in the LMSTn register has been set to 0b (LIN reset mode). In
this mode, the LIN communication and the UART communication functions are all halted, and fLIN also stops.
From LIN reset mode, transitions to LIN mode, UART mode, and LIN self-test mode can be made.
When the mode changes to LIN reset mode, the following registers are initialized to their reset values, and as long as LIN
reset mode is in effect, they retain their initial values.
LTRCn register
LSTn register
LESTn register
LUOERn register
The following registers retain their previous values even when a transition to LIN reset mode is made:
LCHSEL register
LWBRn register
LBRPn0 register
LBRPn1 register
LUSCn register
LMDn register
LBFCn register
LSCn register
LWUPn register
LIEn register
LEDEn register
LDFCn register
LIDBn register
LCBRn register
LUDBn0 register
LDBnm register (m = 1 to 8)
LUORn1 register
LUTDRn register
LURDRn register
LUWTDRn register