EasyManua.ls Logo

Renesas RL78 Series - CAN Receive Buffer Receive Complete Flag Register (RMND0)

Renesas RL78 Series
1879 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
RL78/F13, F14 CHAPTER 18 CAN INTERFACE (RS-CAN LITE)
R01UH0368EJ0210 Rev.2.10 1316
Dec 10, 2015
18.3.25 CAN Receive Buffer Receive Complete Flag Register (RMND0)
Address RMND0L: F0334H, RMND0H: F0335H
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
RMNS[15:0]
After Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Symbol Bit Name Description R/W
15 to 0 RMNS[15:0] Receive Buffer Receive Complete
Flag n
0: Receive buffer n contains no new message (n = 0 to
15).
1: Receive buffer n contains a new message.
R/W
Write 0 to the RMND0 register in global operating mode or global test mode.
RMNS[15:0] Flags
Each RMNS flag is set to 1 when the processing for storing a message in the corresponding receive buffer
starts.
To clear these flags to 0, write 0 to the corresponding flag by the program. In this case, write 0 to bits to be
cleared and write 1 to other bits by using an 8-bit or 16-bit data transfer instruction. These bits cannot be set to
0 while a message is being stored. It takes time of ten clock cycles of f
CLK for storing a message.
These flags are cleared to 0 in global reset mode.

Table of Contents

Other manuals for Renesas RL78 Series

Related product manuals