RL78/F13, F14 CHAPTER 6 TIMER ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 457
Dec 10, 2015
6.3.11 Timer output enable register m (TOEm)
The TOEm register is used to enable or disable timer output of each channel.
Channel n for which timer output has been enabled becomes unable to rewrite the value of the TOmn bit of timer output
register m (TOm) described later by software, and the value reflecting the setting of the timer output function through the
count operation is output from the timer output pin (TOmn).
The TOEm register can be set by a 16-bit memory manipulation instruction.
Set the lower 8 bits of the TOEm register with a 1-bit or 8-bit memory manipulation instruction with TOEmL.
Reset signal generation clears this register to 0000H.
Figure 6-21. Format of Timer Output Enable Register m (TOEm)
Address: F01BAH, F01BBH (TOE0), F01FAH, F01FBH (TOE1) After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TOEm 0 0 0 0 0 0 0 0
TOE
m7
TOE
m6
TOE
m5
TOE
m4
TOE
m3
TOE
m2
TOE
m1
TOE
m0
TOE
mn
Timer output enable/disable of channel n
0 Timer output is disabled.
Timer operation is not applied to the TOmn bit and the output is fixed.
Writing to the TOmn bit is enabled.
1 Timer output is enabled.
Timer operation is applied to the TOmn bit and an output waveform is generated.
Writing to the TOmn bit is ignored.
Caution Be sure to clear bits 15 to 8 to “0”. (unit 1, 0: Group E products, unit 0: Group A products)
Be sure to clear bits 15 to 8 of unit 0 and bits 15 to 4 of unit 1 to "0". (Group B, C, and D products)
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
2. TOE1n is not provided in the Group A products.
TOE17 to TOE14 are not provided in the Group B, C, and D products.
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