Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 825
Dec 10, 2015
15.3.18 Port output mode registers 1, 6, 7, 12 (POM1, POM6, POM7, POM12)
These registers set the output mode of ports 1, 6, 7, and 12 in 1-bit units.
Set the POM1, POM6, POM7, and POM12 registers by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears the POM1, POM6, POM7, and POM12 registers to 00H.
Figure 15-21. Format of Port Output Mode Registers 1, 6, 7, and 12 (POM1, POM6, POM7, POM12)
Address F0051H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
POM1 POM17 POM16 POM15 POM14 POM13 POM12 POM11 POM10
Address F0056H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
POM6 0 0 0 0 POM63 POM62 POM61 POM60
Address F0057H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
POM7 0 0 0 0 0 POM72 POM71 POM70
Address F005CH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
POM12 0 0 0 0 0 0 0 POM120
POMmn Pmn pin output buffer selection (m = 1, 6, 7, 12; n = 0 to 7)
0 Normal output mode
1 N-ch open-drain output (EVDD0 tolerance) mode
Caution Be sure to set bits for pins that are not present to their initial values.

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit