Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 1004
Dec 10, 2015
Figure 15-149. Flowchart of Data Transmission
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), r: IIC number (r = 00, 01, 10, 11),
mn = 00, 01, 10, 11
Starting data transmission
Data transmission
completed
Transfer end interrupt
g
enerated?
No
Yes
Writing data to the SDRmn
register
No
Yes
ACK reception error
St
op con
diti
on genera
ti
on
Data transfer completed?
Yes
No
Address field
transmission completed
Parity error (ACK error) flag
PEFmn = 1 ?

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit