RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1134
Dec 10, 2015
(22) LIN/UART ID Buffer Register (LIDBn)
Address: F06D5H
7 6 5 4 3 2 1 0
IDP[1:0] ID[5:0]
Value after reset:
0 0 0 0 0 0 0 0
Bit Symbol Bit Name Function R/W
5 to 0 ID[5:0] ID Setting Sets the 6-bit ID value to be transmitted in the ID field. R/W
7, 6 IDP[1:0] Parity Setting Sets the parity bits (P) to be transmitted in the ID field. R/W
Set the LIDBn register when the FTS bit in the LTRCn register is 0 (frame transmission or wake-up transmission/reception
is halted).
In LIN self-test mode, this register operates as follows:
Write the value to be transmitted before communication. The reversed value of the value received can be read from the
register after frame transmission/reception is completed (after loopback).
For details of LIN self-test mode, refer to 17.6 LIN Self-Test Mode.
ID bits (ID setting bits)
The ID bit sets the 6-bit ID value to be transmitted in the ID field of the LIN frame.
IDP bits (parity setting bits)
The IDP bits set the parity bits (P0 and P1) to be transmitted in the ID field of the LIN frame.
The IDP0 bit is P0 and the IDP1 bit is P1.
Since parity is not automatically calculated, set the calculation result. Note that if the erroneous result is set, it is transmitted
as is.
To Next Page
Loading...
