Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 18 CAN INTERFACE (RS-CAN LITE)
R01UH0368EJ0210 Rev.2.10 1400
Dec 10, 2015
Figure 18-14. CAN Channel Interrupt Block Diagram
CiCTRL.EWIE
CiERFLL.EWF
CiCTRL.EPIE
CiERFLL.EPF
CiCTRL.BOEIE
CiERFLL.BOEF
CiCTRL.BORIE
CiERFLL.BORF
CiCTRL.OLIE
CiERFLL.OVLF
CiCTRL.BLIE
CiERFLL.BLF
CiCTRL.ALIE
CRXDi
CiERFLL.ALF
CFCCLk.CFTXIE
CFSTSk.CFTXIF
THLSTSi.THLIF
THLCCi.THLIE
TMSTSp.TMTRF0
TMSTSp.TMTRF1
TMIEC.TMIEp
CFSTSk.CFRXIF
CFCCLk.CFRXIE
CiCTRL.BEIE
CiERFLL.BEF
i = 0
k = 0
p = 0 to 3
CANi transmit/receive FIFO receive interrupt
CANi channel transmit interrupt
CANi channel error interrupt
CANi wakeup interrupt
Falling edge detection circuit
Remark
CiCTRH.TAIE

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit