EasyManuals Logo

Renesas RL78 Series User Manual

Renesas RL78 Series
1879 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1467 background imageLoading...
Page #1467 background image
RL78/F13, F14 CHAPTER 19 DTC
R01UH0368EJ0210 Rev.2.10 1435
Dec 10, 2015
Table 19-5. DTC Activation Sources and DTC Vector Addresses (2/2)
Interrupt Request Source Source No. DTC Vector Address Priority
Timer RD compare match A0 26 Address set in DTCBAR register +1AH
Timer RD compare match B0 27 Address set in DTCBAR register +1BH
Timer RD compare match C0 28 Address set in DTCBAR register +1CH
Timer RD compare match D0 29 Address set in DTCBAR register +1DH
Timer RD compare match A1 30 Address set in DTCBAR register +1EH
Timer RD compare match B1 31 Address set in DTCBAR register +1FH
Timer RD compare match C1 32 Address set in DTCBAR register +20H
Timer RD compare match D1 33 Address set in DTCBAR register +21H
Timer RJ0 34 Address set in DTCBAR register +22H
Comparator detection 0
Note 1
35 Address set in DTCBAR register +23H
End of channel 0 of timer array unit 1 count or
capture
Note 2
36 Address set in DTCBAR register +24H
End of channel 1 of timer array unit 1 count or
capture
Note 2
37 Address set in DTCBAR register +25H
End of channel 2 of timer array unit 1 count or
capture
Note 2
38 Address set in DTCBAR register +26H
End of channel 3 of timer array unit 1 count or
capture
Note 2
39 Address set in DTCBAR register +27H
LIN1 reception end
Note 3
40
Address set in DTCBAR register +28H
LIN1 transmission start/end
Note 3
41
Address set in DTCBAR register +29H
End of channel 4 of timer array unit 1 count or
capture
Note 3
42 Address set in DTCBAR register +2AH
Lowest
End of channel 5 of timer array unit 1 count or
capture
Note 3
43 Address set in DTCBAR register +2BH
End of channel 6 of timer array unit 1 count or
capture
Note 3
44 Address set in DTCBAR register +2CH
End of channel 7 of timer array unit 1 count or
capture
Note 3
45 Address set in DTCBAR register +2DH
Remark Group A: RL78/F13 (LIN incorporated) products with 20, 30, 32, 48, or 64 pins and 16 Kbytes to 64 Kbytes of
code flash memory
Group B: RL78/F13 (LIN incorporated) products with 48 or 64 pins and 96 Kbytes to 128 Kbytes of code flash
memory or with 80 pins and 64 Kbytes to 128 Kbytes of code flash memory
Group C: RL78/F13 (LIN and CAN incorporated) products with 30, 32, 48, 64, or 80 pins and 32 Kbytes to
128 Kbytes of code flash memory
Group D: RL78/F14 products with 30, 32, 48, 64, or 80 pins and 48 Kbytes to 96 Kbytes of code flash
memory
Group E: RL78/F14 products with 48, 64, 80, or 100 pins and 128 Kbytes to 256 Kbytes of code flash
memory or with 100 pins and 64 Kbytes to 256 Kbytes of code flash memory
Notes 1. Only in Group D and E products.
2. Only in Group B, C, D, and E products.
3. Only in Group E products.

Table of Contents

Other manuals for Renesas RL78 Series

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Renesas RL78 Series and is the answer not in the manual?

Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

Related product manuals