Renesas RL78 Series - Page 1528

RL78/F13, F14 CHAPTER 21 INTERRUPT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1496
Dec 10, 2015
Figure 21-4. Format of Priority Specification Flag Registers (PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR3L,
PR10L, PR10H, PR11L, PR11H, PR12L, PR12H, PR13L) (3/3)
A
ddress: FFFDAH After reset: FFH R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
PR03L TMPR017 TMPR016 TMPR015 TMPR014
LIN1STAPR
0
LIN1PR0
LIN1RVCPR
0
LIN1TRMPR
0
PPR012
LIN1WUPPR
0
A
ddress: FFFDEH After reset: FFH R/W
Symbol <7> <6> <5> <4> <3> <2> <1> <0>
PR13L TMPR117 TMPR116 TMPR115 TMPR114
LIN1STAPR
1
LIN1PR1
LIN1RVCPR
1
LIN1TRMPR
1
PPR112
LIN1WUPPR
1
XXPR1X XXPR0X Priority level selection
0 0 Specify level 0 (high priority level)
0 1 Specify level 1
1 0 Specify level 2
1 1 Specify level 3 (low priority level)
Caution The above is the bit layout for the 100-pin. The available bits differ depending on the
product. For details about the bits available for each product, see Table 21-2. Be sure
to set bits that are not available to 1.