Renesas RL78 Series

RL78/F13, F14 CHAPTER 21 INTERRUPT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1509
Dec 10, 2015
Table 21-5. Relationship Between Interrupt Requests Enabled for Multiple Interrupt Servicing
During Interrupt Servicing
Multiple Interrupt Request
Interrupt Being Serviced
Maskable Interrupt Request Software
Interrupt
Request
Priority Level 0
(PR = 00)
Priority Level 1
(PR = 01)
Priority Level 2
(PR = 10)
Priority Level 3
(PR = 11)
IE = 1 IE = 0 IE = 1 IE = 0 IE = 1 IE = 0 IE = 1 IE = 0
Maskable interrupt ISP1 = 0
ISP0 = 0

      

ISP1 = 0
ISP0 = 1



    

ISP1 = 1
ISP0 = 0





  

ISP1 = 1
ISP0 = 1









Software interrupt









Remarks 1. : Multiple interrupt servicing enabled
2. : Multiple interrupt servicing disabled
3. ISP0, ISP1, and IE are flags contained in the PSW.
ISP1 = 0, ISP0 = 0: Enables interrupt of level 0 (an interrupt of level 1 or level 0 is being serviced).
ISP1 = 0, ISP0 = 1: Enables interrupt of level 0 and 1 (an interrupt of level 2 is being serviced).
ISP1 = 1, ISP0 = 0: Enables interrupt of level 0 to 2 (an interrupt of level 3 is being serviced).
ISP1 = 1, ISP0 = 1: Enables all interrupts (wait for an interrupt acknowledgment).
IE = 0: Interrupt request acknowledgment is disabled.
IE = 1: Interrupt request acknowledgment is enabled.
4. PR is a flag contained in the PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR03L, PR10L, PR10H,
PR11L, PR11H, PR12L, PR12H, and PR13L registers.
PR = 00: Specify level 0 with PR1 = 0, PR0 = 0 (higher priority level)
PR = 01: Specify level 1 with PR1 = 0, PR0 = 1
PR = 10: Specify level 2 with PR1 = 1, PR0 = 0
PR = 11: Specify level 3 with PR1 = 1, PR0 = 1 (lower priority level)