Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 27 SAFETY FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1607
Dec 10, 2015
Cautions 1. When selecting an event input signal from the ELC using timer input select register 0 (TIS0),
select fCLK using timer clock select register 0 (TPS0).
2. Do not change the select bit of the timer input while inputting data to the TImn pin (m = 0,
1; n = 0 to 7).
3. Each of the high-level and low-level widths of the timer input to be selected should be
(1/f
MCK + 10 ns) or more. So, the TIS02 bit cannot be set to 1 when fSL is selected as fCLK
(the CSS bit in the CKC register is set to 1).

Renesas RL78 Series Specifications

General

Brand	Renesas
Model	RL78 Series
Category	Computer Hardware
Language	English