Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 4 PORT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 212
Dec 10, 2015
Figures 4-5 to 4-12 show block diagrams of port 1 for 100-pin products.
Figure 4-5. Block Diagram of P10
P10/TI13/TO13
/
TRJO0/SCK10/
SCL10/LTXD1/
CTXD0
WR
PU
RD
WR
PORT
PU10
P10
EV DD
P-ch
PU1
P1
WR PM
PM1
POM10
POM1
WR POM
PM10
CMOS
(Schmitt3)
TTL
PIM1
PIM10
WR PIM
PITHL1
PITHL10
WR PITHL
CMOS
(Schmitt1)
WR PMS
PMS
PMS0
SCK10/SCL10
/LTXD1/CTXD0
TO13/TRJO0
Internal bus
Selector
Output latch
Alternate function
Alternate function
Alternate function
P1: Port register 1
PU1: Pull-up resistor option register 1
PM1: Port mode register 1
PIM1: Port input mode register 1
POM1: Port output mode register 1
PMS: Port mode select register
PITHL1: Port input threshold control register 1
RD: Read signal
WRxx: Write signal

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit