Renesas RL78 Series User Manual

Index-23
30.4.3 Selecting communication mode .................................................................................................. 1635
30.4.4 Communication commands ........................................................................................................ 1636
30.5 Processing Time for Each Command when PG-FP5 Is in Use (Reference Value) ........... 1637
30.6 Self-Programming .................................................................................................................. 1638
30.6.1 Self-programming procedure ...................................................................................................... 1639
30.6.2 Boot swap function ..................................................................................................................... 1640
30.6.3 Flash shield window function ...................................................................................................... 1642
30.7 Security Settings .................................................................................................................... 1643
30.8 Data Flash ............................................................................................................................... 1645
30.8.1 Data flash overview ..................................................................................................................... 1645
30.8.2 Register controlling data flash memory ...................................................................................... 1646
30.8.3 Procedure for accessing data flash memory .............................................................................. 1647
CHAPTER 31 ON-CHIP DEBUG FUNCTION ................................................................................... 1648
31.1 Overview of On-chip Debug Function .................................................................................. 1648
31.1.1 Hot Plug-in .................................................................................................................................. 1648
31.1.2 Real-time RAM Monitor (RRM) and Dynamic Memory Modification (DMM) by DTC .................. 1648
31.2 Connecting E1 On-chip Debugging Emulator to RL78/F13 or RL78/F14 .......................... 1650
31.3 On-Chip Debug Security ID ................................................................................................... 1651
31.4 Securing of User Resources ................................................................................................. 1651
31.4.1 Securement of memory space .................................................................................................... 1651
CHAPTER 32 BCD CORRECTION CIRCUIT ................................................................................... 1654
32.1 BCD Correction Circuit Function .......................................................................................... 1654
32.2 Registers Used by BCD Correction Circuit ......................................................................... 1654
32.3 BCD Correction Circuit Operation ........................................................................................ 1655
CHAPTER 33 INSTRUCTION SET ...................................................................................................... 1657
33.1 Conventions Used in Operation List .................................................................................... 1658
33.1.1 Operand identifiers and specification methods ........................................................................... 1658
33.1.2 Description of operation column ................................................................................................. 1659
33.1.3 Description of flag operation column .......................................................................................... 1660
33.1.4 PREFIX instruction ..................................................................................................................... 1660
33.2 Operation List ......................................................................................................................... 1661
CHAPTER 34 ELECTRICAL SPECIFICATIONS (GRADE L) ............................................................ 1679
34.1 Absolute Maximum Ratings .................................................................................................. 1680
34.2 Oscillator Characteristics ...................................................................................................... 1682
34.2.1 Main System Clock Oscillator Characteristics ............................................................................ 1682
34.2.2 On-chip Oscillator Characteristics .............................................................................................. 1683

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit