Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 5 CLOCK GENERATOR
R01UH0368EJ0210 Rev.2.10 416
Dec 10, 2015
Table 5-3. Changing CPU Clock (4/7)
CPU Clock Conditions before Change Processing after Change
Before Change After Change
XT1 clock
High-speed on-chip
oscillator clock
The high-speed on-chip oscillator starts
oscillation, and the high-speed on-chip
oscillator clock is selected as the main system
clock.
 HIOSTOP = 0, MCS = 0
XT1 oscillation can be stopped.
(XTSTOP = 1)
X1 clock
X1 oscillation is stable, and the high-speed
system clock is selected as the main system
clock.
 OSCSEL = 1, EXCLK = 0, MSTOP = 0
 After elapse of oscillation stabilization time
 MCS = 1
External main system
clock
External clock input from the EXCLK pin is
enabled, and the high-speed system clock is
selected as the main system clock.
 OSCSEL = 1, EXCLK = 1, MSTOP = 0
 SELLOSC = 0, MCS = 1
External subsystem
clock
Prohibited to change. (To change the CPU
clock, clear the settings first and then reset the
settings.)

Low-speed on-chip
oscillator clock
Prohibited to change. (To change the CPU
clock, specify the main system/PLL select
clock as the CPU clock first and then reset the
settings.)
Remark For details about the register flag settings for stopping the target clock during the processing after change and
conditions before the clock is stopped, see 5.6.9 Conditions Before Clock Oscillation Is Stopped.

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit