Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 7 TIMER RJ
R01UH0368EJ0210 Rev.2.10 550
Dec 10, 2015
TSTART
Timer RJ count start
Note 4
R/W
0 Count stops R/W
1 Count starts
Count operation is started by writing 1 to the TSTART bit and stopped by writing 0. When the TSTART bit
is set to 1 (count starts), the TCSTF bit is set to 1 (count in progress) in synchronization with the count
source. Also, after 0 is written to the TSTART bit, the TCSTF bit is set to 0 (count stops) in synchronization
with the count source. For details, see 7. 5. 1 Count Operation Start and Stop Control.
Notes 1. Set the TRJCR0 register by an 8-bit memory manipulation instruction.
2. The 20-pin products do not have the active edge judgement flag.
3. When 1 (count is forcibly stopped) is written to the TSTOP bit, bits TSTART and TCSTF are initialized at the
same time. The pulse output level is also initialized.
4. For notes on using bits TSTART and TCSTF, see 7. 5. 1 Count Operation Start and Stop Control.

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit