Renesas RL78 Series

RL78/F13, F14 CHAPTER 9 REAL-TIME CLOCK
R01UH0368EJ0210 Rev.2.10 657
Dec 10, 2015
Figure 9-1. Block Diagram of Real-time Clock
f SUB
f MX
f IH
RTC clock select register (RTCCL)
Timer input select
register 2 (TIS2)
Timer input select
register 1 (TIS1)
RTCCL_7 RTCCL_6 TIS23 TIS22 TIS17 TIS16 TIS14RTCCKS1 RTCCKS0
INTRTC
RTCE RCLOE1 AMPM CT2 CT1 CT0
RTCE
AMPM
CT0 to CT2
f RTC
RWAIT
WALE WALIE WAFG RWAIT
RWST
RIFG
RWST
RIFG
Real-time clock control register 1 Real-time clock control register 0
Alarm week
register
(ALARMWW)
(7-bit)
Alarm hour
register
(ALARMWH)
(6-bit)
Alarm minute
register
(ALARMWM)
(7-bit)
Year count
register
(YEAR)
(8-bit)
Month count
register
(MONTH)
(5-bit)
Week count
register
(WEEK)
(3-bit)
Day count
register
(DAY)
(6-bit)
Hour count
register
(HOUR)
(6-bit)
Minute count
register
(MIN)
(7-bit)
Second
count
register
(SEC)
(7-bit)
Wait control
0.5
seconds
Internal
counter
(16 bits)
Selector
Selector
Selector
Division
control
Buffer
Buffer
Buffer
Buffer Buffer Buffer Buffer
Count enable/
disable circuit
Watch error
correction
register
(SUBCUD)
(8-bit)
16-bit watch
error correction
register
(SUBCUDW)
(16-bit)
Internal bus
RTCCKS1 RTCCL_6, RTCCKS0 RTCCL_7
1 month
1 day 1 hour
1 minute
RTC1HZ
Timer array units 0 and 1
1 seconds
1 year
Output
controller