Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 831
Dec 10, 2015
Figure 15-24. Each Register Setting When Stopping the Operation by Channels (2/2)
(e) Serial slave select enable register (SSEm) … This register controls the SSImn pin in each slave
channel.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SSEm
0 0 0 0 0 0 0 0 0 0 0 0 0 0
SSEm1
0/1
SSEm0
0/1
0: Disables the input value of the SSImn pin
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0, 1)
2. : Setting disabled (set to the initial value)
0/1: Set to 0 or 1 depending on the usage of the user

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit