Intel Arria 10 User Manual

Addr Bit R/W Name Description
8:7 RW
PS2,PS1
Pause support for the local device. The following
encodings are defined for PS1/PS2:
• PS1=0 / PS2=0: Pause is not supported
• PS1=0 / PS2=1: Asymmetric pause toward link
partner
• PS1=1 / PS2=0: Symmetric pause
• PS1=1 / PS2=1: Pause is supported on TX and RX
13:
12
RW
RF2,RF1
Remote fault condition for local device. The following
encodings are defined for RF1/RF2:
• RF1=0 / RF2=0: No error, link is valid (reset
condition)
• RF1=0 / RF2=1: Offline
• RF1=1 / RF2=0: Failure condition
• RF1=1 / RF2=1: AN error
14 R0
ACK
Acknowledge for local device. A value of 1 indicates
that the device has received three consecutive
matching ability values from its link partner.
15 RW
NP
Next page. In the device ability register, this bit is
always set to 0.
0x495
(1000BASE-
X mode)
5 R
FD
Full-duplex mode enable for the link partner. This bit
must be 1 because only full duplex is supported.
6 R
HD
Half-duplex mode enable for the link partner. A value
of 1 indicates support for half duplex. This bit must be
0 because half-duplex mode is not supported.
8:7 R
PS2,PS1
Specifies pause support for link partner. The following
encodings are defined for PS1/PS2:
• PS1=0 / PS2=0: Pause is not supported
• PS1=0 / PS2=1: Asymmetric pause toward link
partner
• PS1=1 / PS2=0: Symmetric pause
• PS1=1 / PS2=1: Pause is supported on TX and RX
13:
12
R
RF2,RF1
Remote fault condition for link partner. The following
encodings are defined for RF1/RF2:
• RF1=0 / RF2=0: No error, link is valid (reset
condition)
• RF1=0 / RF2=1: Offline
• RF1=1 / RF2=0: Failure condition
• RF1=1 / RF2=1: AN error
14 R
ACK
Acknowledge for link partner. A value of 1 indicates
that the device has received three consecutive
matching ability values from its link partner.
15 R
NP
Next page. In link partner register. When set to 0, the
link partner has a Next Page to send. When set to 1,
the link partner does not send a Next Page. Next Page
is not supported in AN.
0x494
(SGMII
mode)
14 RO
ACK
Local device acknowledge. Value as specified in IEEE
802.3z standard.
0x495
(SGMII
mode)
11:
10
RO
Speed[1:0]
Link partner speed:
• 00: copper interface speed is 10 Mbps
• 01: copper interface speed is 100 Mbps
• 10: copper interface speed is 1 Gigabit
• 11: reserved
continued...
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
193

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex