Intel Arria 10 User Manual

PRBS test patterns may be considered equivalent to "noise". Use these patterns to
test the transceiver link with a noisy signal by placing the transceiver in loopback
mode.
Use PRBS7 and PRBS9 to test transceiver links with linear impairments, and with 8B/
10B.
Use PRBS15 for jitter evaluation.
Use PRBS23 or PRBS31 for jitter evaluation (data-dependent jitter) of non-8B/10B
links, such as SDH/SONET/OTN jitter testers. Most 40G, 100G, and 10G applications
use PRBS31 for link evaluation.
Figure 240. PRBS Generator for Serial Implementation of PRBS9 Pattern
S0 S1 S4 S5 S8
PRBS Output
Note: All supported PRBS generators are similar to the PRBS9 generator.
Refer to the Reconfiguration Interface and Dynamic Reconfiguration chapter for
configuration details.
Related Information
Reconfiguration Interface and Dynamic Reconfiguration on page 502
5.2.1.5.2. Pseudo-Random Pattern Generator
The pseudo-random pattern (PRP) generator is specifically designed for the 10GBASE-
R and 1588 protocols. The PRP generator block operates in conjunction with the
scrambler to generate pseudo-random patterns for the TX and RX tests in the 10G
Ethernet mode. You can use the Arria 10 Pseudo Random Pattern (PRP) generator in
the scrambler to generate random data pattern and seed that the scrambler can use.
The PRP mode is a test mode of the scrambler. Two seeds are available to seed the
scrambler: all 0s or two local fault-ordered sets. The seed is used in the scrambler to
produce the pattern. PRP is only available when the scrambler is enabled.
Refer to the Reconfiguration Interface and Dynamic Reconfiguration chapter for
configuration details.
Related Information
Reconfiguration Interface and Dynamic Reconfiguration on page 502
5. Arria 10 Transceiver PHY Architecture
UG-01143 | 2018.06.15
Intel
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10 Transceiver PHY User Guide
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Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex