Note: If reconfiguration involved data rate or protocol mode changes, you may need to
reconfigure the PMA analog parameters of the channels. Refer to the Changing PMA
Analog Parameters section for more details.
The bit values that must be changed to obtain the new configuration may span across
multiple addresses, such as when switching between Standard, Enhanced, and PCS
Direct data paths. It is difficult to manually compare these values for the base and
modified configurations and then build logic to stream the different values in the
modified configuration. You can use the multiple profiles feature of the Native PHY/ATX
PLL IP cores to store the parameter settings (MIF configuration file) to memory. With
the configuration content saved, you can read from the memory and write the content
to the target channel for reconfiguration. Optionally, you can also use the embedded
reconfiguration streamer feature of the Native PHY/ATX PLL IP cores, which includes
the logic to store the individual profile information and logic to perform streaming.
Using the embedded reconfiguration streamer, you can reduce the number of read-
modify-write operations to obtain the modified configuration.
To perform dynamic reconfiguration using the Embedded Reconfiguration Streamer:
1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address x340 with the desired profile select,
broadcast bit (applicable for Native PHY only), and configuration load bit set
accordingly. For example, to stream profile 1 to a channel, perform a read-modify-
write to bits x340[2:0] with 3’b001, bit x340[6] with 1’b0 to disable broadcasting,
and bit x340[7] with 1’b1 to initiate streaming.
3. Poll the streamer busy bit at address x341 (x341[0]) at regular intervals. When
the busy bit is 1’b0, the reconfiguration is complete.
4. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
Note: If reconfiguration involved data rate or protocol mode changes, you may need to
reconfigure the PMA analog parameters of the channels. Refer to the Changing PMA
Analog Parameters section for more details.
Figure 272. Timing Diagram for Embedded Streamer Reconfiguration
reconfig_clk
reconfig_address
reconfig_read
reconfig_readdata
reconfig_waitrequest
reconfig_write
reconfig_writedata
xxx 0x340h 0x341h 0x000h
0x00h0x01h0x01h0x01h0x00hxxx
0x00h 0x00h0x81h 0x00h
User Requests
Streaming
User Polls
Streaming
Busy Bit
Streaming in
Progress; Streaming
Busy Bit Is High
Streaming Completes;
Streaming Busy Bit Is Low
Related Information
• Arbitration on page 512
• Changing PMA Analog Parameters on page 527
• Steps to Perform Dynamic Reconfiguration on page 516
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-01143 | 2018.06.15
Intel
®
Arria
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10 Transceiver PHY User Guide
520