Intel Arria 10 User Manual

Reconfigur
ation
Address
(HEX)
Reconfigur
ation Bit
Attribute Name Related
Addresses
Attribute
Encoding
Bit
Encoding
Description
[6] prbs_clken prbs_clk_dis 1'b0 Disable PRBS generator
clock
prbs_clk_en 1'b1 Enable PRBS generator
clock
0x007 [7:4] prbs_gen_pat 0x8 prbs_7 4'b0001 Enable PRBS7 pattern
prbs_9 4'b0010 Enable PRBS9 pattern
prbs_15 4'b0100 Enable PRBS15 pattern
prbs_23 4'b1000 Enable PRBS23 pattern
prbs_31 4'b0000 Enable PRBS31 pattern
0x008 [4] prbs_gen_pat 0x7 prbs_7 1'b0 Enable PRBS7 pattern
prbs_9 1'b0 Enable PRBS9 pattern
prbs_15 1'b0 Enable PRBS15 pattern
prbs_23 1'b0 Enable PRBS23 pattern
prbs_31 1'b1 Enable PRBS31 pattern
[6:5] tx_pma_data_sel 0x6 prbs_pat 2'b00 Enable PRBS generator
0x110 [2:0] ser_mode sixty_four_bit 3'b011 64-bit mode
ten_bit 3'b100 10-bit mode
0x111 [4:0] x1_clock_source_
sel
0x119 xn_non_bonding
(6
3)
5'b11000 Enables xn non bonding
Table 293. Register Map for PRBS Checker for bonded and non bonded designs
Reconfiguratio
n Address
(HEX)
Reconfiguratio
n Bit
Attribute Name Related
Addresses
Attribute
Encoding
Bit
Encoding
Description
0x00A [7] prbs_clken prbs_clk_dis 1'b0 Disable PRBS checker
clock
prbs_clk_en 1'b1 Enable PRBS checker
clock
0x00B [3:2] rx_prbs_mask prbsmask1024 2'b11 Counter threshold to
1023
prbsmask128 2'b00 Counter threshold to
127
prbsmask256 2'b01 Counter threshold to
255
prbsmask512 2'b10 Counter threshold to
511
[7:4] prbs_ver 0xC prbs_7 4'b0001 Enable PRBS7 pattern
continued...
(63)
You must read and save the value in the register 0x111[5:0] before changing the
x1_clcok_source_sel setting to xN non bonding. To disable the PRBS generator, write the
original values back into the read-modify-write address.
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
552

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex