Intel Arria 10 User Manual

Document
Version
Changes
• Removed the ODI section from 'Register Map' tab.
• Changed the DFE adaptation mode from "Continuous" to "Adaptation enabled".
• Changed the DFE adaptation mode from "Continuous" to "Adaptation enabled".
2016.02.11 Made the following changes:
• Updated the maximum data rate to 25.8 Gbps.
2015.12.18 Made the following changes:
• Updated the “Available Options” table for non-HCSL standards, in the“Dedicated Reference Clock
Settings” section.
2015.11.02 Made the following changes:
• Changed the setting for "XCVR_A10_RX_EQ_DC_GAIN_TRIM" parameter in the CTLE Settings
section.
• Updated the "Analog Parameter Settings List" table to reflect the number of DFE fixed taps.
• Updated "DFE Fixed Tap Assignments" table in the Decision Feedback Equalizer (DFE) Settings
section.
• Updated descriptions for XCVR_A10_RX_LINK QSF assignment in “Receiver General Analog
Settings” section.
• Updated description for XCVR_A10_RX_EQ_DC_GAIN_TRIM QSF,
XCVR_A10_RX_ADP_CTLE_EQZ_1S_SEL QSF,XCVR_A10_RX_ADP_CTLE_ACGAIN_4S QSF, and
XCVR_A10_RX_ADP_VGA_SEL QSF assignments in “Receiver Analog Equalization Settings” section.
• Updated description for XCVR_A10_TX_LINK QSF, XCVR_A10_TX_SLEW_RATE_CTRL QSF, and
XCVR_A10_TX_LINK QSF assignments in “Transmitter General Analog Settings” section.
2015.05.11 Made the following changes:
• Corrected typos in the Syntax description of each parameter setting.
• Added the XCVR_A10_TX_SLEW_RATE_CTRL parameter.
• Changed the available values for the following parameters:
— XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T
— XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP
— XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP
2014.12.15 Made the following changes:
• Modified the Rules section for XCVR_A10_TX_COMPENSATION_EN.
• Changed Available Options for XCVR_A10_RX_ONE_STAGE_ENABLE parameter settings table.
• Changed the "XCVR_A10_RX_ADP_CTLE_ACGAIN_4S" parameter setting.
• Added "XCVR_VCCR_VCCT_VOLTAGE" parameter setting.
2014.08.15 Initial release.
8. Analog Parameter Settings
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
607

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex