Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 16 SERIAL INTERFACE IICA
R01UH0368EJ0210 Rev.2.10 1084
Dec 10, 2015
(f) When arbitration loss occurs due to low-level data when attempting to generate a restart condition
(i) When WTIM0 = 0
1: IICS0 = 1000×110B
2: IICS0 = 1000×000B (Sets the WTIM0 bit to 1)
3: IICS0 = 1000×100B (Clears the WTIM0 bit to 0)
4: IICS0 = 01000000B
5: IICS0 = 00000001B
Remark : Always generated
: Generated only when SPIE0 = 1
×: Don’t care
(ii) When WTIM0 = 1
1: IICS0 = 1000×110B
2: IICS0 = 1000×100B (Sets the STT0 bit to 1)
3: IICS0 = 01000100B
4: IICS0 = 00000001B
Remark : Always generated
: Generated only when SPIE0 = 1
×: Don’t care
ST AD6 to AD0 R/W ACK D7 to D0 D7 to D0ACK SPACK D7 to D0 ACK
STT0 = 1
↓
3 4 5 2
1
ST AD6 to AD0 R/W ACK D7 to D0 D7 to D0ACK SPACK D7 to D0 ACK
STT0 = 1
↓
3 4 2
1

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit