Renesas RL78 Series User Manual

Index-6
CHAPTER 6 TIMER ARRAY UNIT ...................................................................................................... 424
6.1 Functions of Timer Array Unit ................................................................................................... 426
6.1.1 Independent channel operation function ........................................................................................ 426
6.1.2 Simultaneous channel operation function ....................................................................................... 427
6.1.3 8-bit timer operation function (channels 1 and 3 only) .................................................................... 428
6.1.4 LIN-bus supporting function (channel 7 of unit 0 only) ................................................................... 429
6.2 Configuration of Timer Array Unit ............................................................................................ 430
6.2.1 Timer count register mn (TCRmn) .................................................................................................. 436
6.2.2 Timer data register mn (TDRmn) .................................................................................................... 438
6.3 Registers Controlling Timer Array Unit .................................................................................... 439
6.3.1 Peripheral enable register 0 (PER0) ............................................................................................... 440
6.3.2 Timer clock select register m (TPSm) ............................................................................................ 441
6.3.3 Timer mode register mn (TMRmn) ................................................................................................. 444
6.3.4 Timer status register mn (TSRmn) ................................................................................................. 450
6.3.5 Timer channel enable status register m (TEm) ............................................................................... 451
6.3.6 Timer channel start register m (TSm) ............................................................................................. 452
6.3.7 Timer channel stop register m (TTm) ............................................................................................. 453
6.3.8 Timer input select register 0 (TIS0) ................................................................................................ 454
6.3.9 Timer input select register 1 (TIS1) ................................................................................................ 455
6.3.10 Timer input select register 2 (TIS2) .............................................................................................. 456
6.3.11 Timer output enable register m (TOEm) ....................................................................................... 457
6.3.12 Timer output register m (TOm) ..................................................................................................... 458
6.3.13 Timer output level register m (TOLm) ........................................................................................... 459
6.3.14 Timer output mode register m (TOMm) ........................................................................................ 460
6.3.15 Noise filter enable registers 1, 2 (NFEN1, NFEN2) ...................................................................... 461
6.3.16 Port mode registers 1, 3, 4, 7, 12 (PM1, PM3, PM4, PM7, PM12) .............................................. 464
6.3.17 PWM output delay control register 1 (PWMDLY1) ....................................................................... 466
6.3.18 PWM output delay control register 2 (PWMDLY2) ....................................................................... 467
6.4 Basic Rules of Timer Array Unit ............................................................................................... 468
6.4.1 Basic rules of simultaneous channel operation function ................................................................. 468
6.4.2 Basic rules of 8-bit timer operation function (channels 1 and 3 only) ............................................. 470
6.5 Operation Timing of Counter .................................................................................................... 471
6.5.1 Count clock (fTCLK) ....................................................................................................................... 471
6.5.2 Start timing of counter .................................................................................................................... 473
6.5.3 Operation of counter ....................................................................................................................... 474
6.6 Channel Output (TOmn pin) Control ........................................................................................ 479
6.6.1 TOmn pin output circuit configuration ............................................................................................. 479
6.6.2 TOmn Pin Output Setting ............................................................................................................... 480
6.6.3 Cautions on Channel Output Operation ......................................................................................... 481
6.6.4 Collective manipulation of TOmn bit ............................................................................................... 486
6.6.5 Timer Interrupt and TOmn Pin Output at Operation Start ............................................................... 487

Renesas RL78 Series Specifications

General

Core	RL78
CPU Clock Speed	Up to 32 MHz
Flash Memory	Up to 512 KB
RAM	Up to 32 KB
Operating Voltage	1.6 V to 5.5 V
Low Power Modes	HALT, STOP, SNOOZE
CPU Architecture	16-bit
Temperature Range	-40°C to +85°C
Package	LQFP
Timers	16-bit timers
Communication Interfaces	UART, I2C, LIN
A/D Converter	12-bit