Renesas RL78 Series

Index-5
CHAPTER 5 CLOCK GENERATOR .................................................................................................... 362
5.1 Functions of Clock Generator ................................................................................................... 362
5.2 Configuration of Clock Generator ............................................................................................ 365
5.3 Registers Controlling Clock Generator .................................................................................... 369
5.3.1 Clock Operation Mode Control Register (CMC) ............................................................................. 369
5.3.2 System Clock Control Register (CKC) ............................................................................................ 372
5.3.3 Clock Operation Status Control Register (CSC) ............................................................................. 374
5.3.4 Oscillation Stabilization Time Counter Status Register (OSTC) ..................................................... 375
5.3.5 Oscillation Stabilization Time Select Register (OSTS) ................................................................... 377
5.3.6 Peripheral Enable Registers 0, 1, 2 (PER0, PER1, PER2)............................................................. 379
5.3.7 Operation Speed Mode Control Register (OSMC) ......................................................................... 385
5.3.8 High-Speed On-Chip Oscillator Frequency Select Register (HOCODIV) ....................................... 386
5.3.9 High-Speed On-Chip Oscillator Trimming Register (HIOTRM) ....................................................... 387
5.3.10 CAN Clock Select Register (CANCKSEL) .................................................................................... 388
5.3.11 LIN Clock Select Register (LINCKSEL) ........................................................................................ 389
5.3.12 Clock Select Register (CKSEL) .................................................................................................... 390
5.3.13 PLL Control Register (PLLCTL) .................................................................................................... 391
5.3.14 PLL Status Register (PLLSTS) ..................................................................................................... 393
5.3.15 fMP Clock Division Register (MDIV) ............................................................................................. 394
5.4 System Clock Oscillator ............................................................................................................ 395
5.4.1 X1 Oscillator ................................................................................................................................... 395
5.4.2 XT1 Oscillator ................................................................................................................................. 395
5.4.3 High-Speed On-Chip Oscillator ...................................................................................................... 399
5.4.4 PLL Circuit ...................................................................................................................................... 399
5.4.5 Low-Speed On-Chip Oscillator ....................................................................................................... 399
5.4.6 WDT-Dedicated Low-Speed On-Chip Oscillator ............................................................................. 399
5.5 Clock Generator Operation ....................................................................................................... 400
5.6 Controlling Clock ........................................................................................................................ 402
5.6.1 Example of Setting High-Speed On-Chip Oscillator ....................................................................... 402
5.6.2 Example of Setting X1 Oscillator .................................................................................................... 404
5.6.3 Example of Setting XT1 Oscillator .................................................................................................. 405
5.6.4 Examples of Setting PLL Circuit ..................................................................................................... 406
5.6.5 Example of Setting Low-Speed On-Chip Oscillator ........................................................................ 408
5.6.6 CPU Clock Status Transition Diagram ........................................................................................... 409
5.6.7 Conditions before Changing CPU Clock and Processing after Changing CPU Clock .................... 413
5.6.8 Time Required for Switchover of CPU Clock, Main System/PLL Select Clock, and
Main System Clock ....................................................................................................................... 420
5.6.9 Conditions Before Clock Oscillation Is Stopped ............................................................................. 422
5.7 Usage Notes ................................................................................................................................ 423
5.7.1 CPU/Peripheral Hardware Clock .................................................................................................... 423
5.7.2 High-Speed On-Chip Oscillator ...................................................................................................... 423