Renesas RL78 Series

Index-4
4.2.8 Port 8 .............................................................................................................................................. 270
4.2.9 Port 9 .............................................................................................................................................. 280
4.2.10 Port 10 .......................................................................................................................................... 283
4.2.11 Port 12 .......................................................................................................................................... 288
4.2.12 Port 13 .......................................................................................................................................... 295
4.2.13 Port 14 .......................................................................................................................................... 298
4.2.14 Port 15 .......................................................................................................................................... 300
4.3 Registers Controlling Port Function ........................................................................................ 307
4.3.1 Port mode registers (PMxx) ............................................................................................................ 319
4.3.2 Port registers (Pxx) ......................................................................................................................... 320
4.3.3 Pull-up resistor option registers (PUxx) .......................................................................................... 322
4.3.4 Port input mode registers (PIM1, PIM3, PIM5 to PIM7, PIM12) ..................................................... 323
4.3.5 Port output mode registers (POM1, POM6, POM7, POM12) ......................................................... 324
4.3.6 Port mode control registers 7, 9, 12 (PMC7, PMC9, PMC12) ........................................................ 325
4.3.7 A/D port configuration register (ADPC) .......................................................................................... 326
4.3.8 Port input threshold control register
(PITHL1, PITHL3 to PITHL7, PITHL10, PITHL12, PITHL15) ........................................................ 328
4.3.9 Peripheral I/O redirection register 0 (PIOR0) .................................................................................. 330
4.3.10 Peripheral I/O redirection register 1 (PIOR1) ................................................................................ 331
4.3.11 Peripheral I/O redirection register 2 (PIOR2) ................................................................................ 332
4.3.12 Peripheral I/O redirection register 3 (PIOR3) ................................................................................ 333
4.3.13 Peripheral I/O redirection register 4 (PIOR4) ................................................................................ 334
4.3.14 Peripheral I/O redirection register 5 (PIOR5) ................................................................................ 336
4.3.15 Peripheral I/O redirection register 6 (PIOR6) ................................................................................ 337
4.3.16 Peripheral I/O redirection register 7 (PIOR7) ................................................................................ 338
4.3.17 Peripheral I/O redirection register 8 (PIOR8) ................................................................................ 339
4.3.18 Port output slew rate register (PSRSEL) ...................................................................................... 340
4.3.19 SNOOZE status output control register 0 (PSNZCNT0) ............................................................... 341
4.3.20 SNOOZE status output control register 1 (PSNZCNT1) ............................................................... 342
4.3.21 SNOOZE status output control register 2 (PSNZCNT2) ............................................................... 343
4.3.22 SNOOZE status output control register 3 (PSNZCNT3) ............................................................... 344
4.3.23 Port mode select register (PMS) .................................................................................................. 345
4.4 Port Function Operations .......................................................................................................... 346
4.4.1 Writing to I/O port ........................................................................................................................... 346
4.4.2 Reading from I/O port ..................................................................................................................... 346
4.4.3 Operations on I/O port .................................................................................................................... 346
4.4.4 Connecting to external device with different potential (3 V) ............................................................ 347
4.5 Settings of Port Mode Register and Output Latch When Using Alternate Function ........... 349
4.6 Cautions When Using Port Function ........................................................................................ 360
4.6.1 Cautions on 1-bit manipulation instruction for port register n (Pn) .................................................. 360
4.6.2 Notes on specifying the pin settings ............................................................................................... 361