Renesas RL78 Series - Page 1202

RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1170
Dec 10, 2015
(6) LIN Wake-up Baud Rate Select Register (LWBRn)
Address: F06C1H
7 6 5 4 3 2 1 0
NSPB[3:0] LPRS[2:0] —
Value after reset:
0 0 0 0 0 0 0 0
Bit Symbol Bit Name Function R/W
0 — Reserved This bit is always read as 0. The write value should
always be 0.
R/W
3 to 1 LPRS
[2:0]
Prescaler Clock Select
b3 b1
0 0 0: 1/1
0 0 1: 1/2
0 1 0: 1/4
0 1 1: 1/8
1 0 0: 1/16
1 0 1: 1/32
1 1 0: 1/64
1 1 1: 1/128
R/W
7 to 4 NSPB
[3:0]
Bit Sampling Count Select
b7 b4
0 0 0 0: 16 sampling
0 1 0 1: 6 sampling
0 1 1 0: 7 sampling
0 1 1 1: 8 sampling
1 0 0 0: 9 sampling
1 0 0 1: 10 sampling
1 0 1 0: 11 sampling
1 0 1 1: 12 sampling
1 1 0 0: 13 sampling
1 1 0 1: 14 sampling
1 1 1 0: 15 sampling
1 1 1 1: 16 sampling
Settings other than the above are prohibited.
R/W
Set the LWBRn register when the OMM0 bit in the LMSTn register is 0 (LIN reset mode).
LPRS[2:0] bits (prescaler clock select bits)
The LPRS bits select the frequency division ratio for the prescaler.
The LIN communication clock source frequency is divided based on this prescaler.
NSPB[3:0] bits (bit sampling count select bits)
The NSPB bits select the number of sampling in one Tbit (reciprocal of the baud rate).
In UART mode (LIN/UART mode select bits in LIN/UART mode register = 01b), the NSPB bits can be set for 6 to 16 sampling.